An implementation flow refers to the various processes applied to a programmatic representation of a circuit design to implement that circuit design within a specific target programmable logic device (PLD) such as a field programmable gate array (FPGA). An implementation flow typically includes processes, or implementation stages, such as synthesis, translation, packing, placing, and routing. These implementation stages are applied to a hardware description language (HDL) description of the circuit design to derive the bitstream that ultimately programs the PLD.
Incremental implementation flow (incremental flow) refers to a methodology for processing circuit descriptions in a manner that attempts to reuse implementation data generated for selected portions of the circuit description. For example, if a particular section of a circuit description is not changed, but other portions are changed, the implementation data generated from synthesis, translation, packing, placing, and/or routing for the unchanged sections of the circuit description may be reused in subsequent incremental flows. Reuse of implementation data for unchanged sections means that those sections do not have to be reprocessed through the various stages of implementation. This can be beneficial, particularly where the circuit design undergoes only an incremental or minor change.
As an example, an incremental change can be one that affects only a portion of the design, for example, one branch of the design hierarchy, without affecting other parts of the design. Typically, an incremental change neither significantly alters the size of the circuit design nor adversely affects the timing of the circuit design as a whole. Still, an incremental change can be more substantive in that timing may be adversely affected. More specific examples of incremental design changes can include, but are not limited to, changes to state machines, control logic, or the addition of registers intended to improve performance of the circuit design.
Conventional software-based circuit design tools automatically determine which portions of a circuit design can be reused in an incremental flow from a prior implementation flow. Typically, this determination is made by identifying unchanged sections of the HDL circuit description and reusing the implementation data generated for those unchanged sections.